ARM64 Exception Decoder
Decode and explain ARM64 exception syndrome registers. Useful for analyzing crash dumps and exception handlers.
💡 This page accepts URL parameters for crash dump handlers: ?esr=VALUE&far=VALUE&spsr=VALUE
Exception Syndrome Register
ESR_EL1
Exception Syndrome Register (EL1)
Bitfields
ISS [24:0]
Instruction Specific Syndrome
IL [25:25]
Instruction Length
EC [31:26]
Exception Class
Fault Address Register
FAR_EL1
Fault Address Register (EL1) - Contains the faulting virtual address
Saved Program Status Register
SPSR_EL1
Saved Program Status Register (EL1) - Processor state at time of exception
Bitfields
M [3:0]
Exception Level and Selected SP
N [31:31]
Negative condition flag
Z [30:30]
Zero condition flag
C [29:29]
Carry condition flag
V [28:28]
Overflow condition flag